描述
ADI AD9253 AD9253BCPZ-105 analog-to-digital converter (ADC) IC Quad-Channel, 14-Bit ADC (105 MSPS, LVDS Interface, LFCSP-48 Package, for Communications System Applications)
Large Quantities, Price Negotiable!
The AD9253 is a quad-channel, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC) with an integrated sample-and-hold circuit. It features low cost, low power, small size, and ease of use. Operating at conversion rates up to 125 MSPS, it is optimized for applications where small package size is critical, offering excellent dynamic performance and low power consumption. The ADC requires a single 1.8 V power supply and an LVPECL/CMOS/LVDS-compatible sample rate clock for full performance. In many applications, no external reference or driver components are required. The ADC automatically multiplies the sample rate clock to match the appropriate LVDS serial data rate. A data clock output (DCO) is provided for capturing output data, and a frame clock output (FCO) is provided to indicate a new output byte. A single-channel power-down function is supported, and typical power consumption is less than 2 mW when all channels are disabled. The ADC includes several features designed to maximize flexibility and reduce system cost, such as programmable output clock and data alignment and digital test pattern generation. Available digital test patterns include built-in deterministic and pseudorandom patterns, as well as custom user-defined test patterns input via the serial port interface (SPI). The AD9253 is available in a RoHS-compliant 48-lead LFCSP package. It operates over the industrial temperature range of -40°C to +85°C..
Original Spot Stock, Accepting Pre-orders! |
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Product Features
1. 1.8 V power supply
2. Low power consumption: 110 mW per channel at 125 MSPS, with scalable power options
3. Signal-to-noise ratio (SNR) = 74 dB (to Nyquist frequency)
4. Spurious-free dynamic range (SFDR) = 90 dBc (to Nyquist frequency)
5. Differential nonlinearity (DNL) = ±0.75 LSB (typical); integral nonlinearity (INL) = ±2.0 LSB (typical)
6. Serial LVDS (ANSI-644, default) and low-power, simplified signaling option (similar to IEEE 1596.3)
7. 650 MHz analog bandwidth at full power
8. 2 V peak-to-peak input voltage range
9. Serial port control
10. Full-chip and single-channel power-down modes
11. Flexible bit direction
12. Built-in and custom digital test pattern generation
13. Multi-chip synchronization and clock divider
14. Programmable output clock and data alignment
15 Programmable output resolution
16-bit standby mode
Applications
1. Medical ultrasound
2. High-speed imaging
3. Quadrature radio receivers
4. Diversity radio receivers
5. Test equipment
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